Temperature compensated oscillator using a control voltage generation circuit

ABSTRACT

The temperature of an oscillation circuit ( 47 ) is detected by a temperature detection circuit ( 13 ), a cubic term voltage generation circuit of a control voltage generation circuit ( 23 ) generates a cubic term voltage as a control voltage based on an output voltage of the temperature detection circuit ( 13 ), and a frequency adjustment circuit ( 45 ) changes an oscillation frequency of the oscillation circuit ( 47 ) by the control voltage. The cubic term voltage generation circuit includes a first MOS transistor ( 37 ) having a source connected to a first power line ( 25 ), a second MOS transistor ( 35 ) having a source connected to a second power line ( 26 ), and digital control voltage division circuits ( 31, 33 ) for generating a first and a second gate voltage, respectively based on the output voltage of the temperature detection circuit ( 13 ), in which the first and second gate voltages are applied to gates of the first and second MOS transistors ( 37, 35 ) respectively, and a connection point ( 44 ) where respective drains are commonly connected shall be an output terminal of the control voltage.

TECHNICAL FIELD

The present invention relates to a temperature compensated oscillator inwhich temperature characteristics of a crystal oscillator using acrystal resonator are compensated.

BACKGROUND TECHNOLOGY

A crystal oscillator using a crystal resonator is superior in stabilityof frequency to other oscillators, but when it is used as a referenceoscillator for mobile radio communication in recent years, variations inoscillation frequency caused by temperature characteristics of thecrystal resonator present a problem. In order to solve the problem, aso-called temperature compensated oscillator is widely used in whichtemperature characteristics of a crystal resonator are compensated.

Among the temperature compensated oscillators, one by a method calledindirect method has been reduced in the number of parts and improved inperformance with recent developments in the integrated circuittechnology.

The principle of compensating temperature of the temperature compensatedoscillator by the indirect method is explained using FIG. 17.

A temperature detection circuit 91 in FIG. 17 generates a temperaturedetection voltage depending on a temperature. The voltage is inputted toa high temperature part/low temperature part separation circuit 92 and agradient correction voltage generation circuit 93. The high temperaturepart/low temperature part separation circuit 92 separates the voltageinputted thereto into two for a low temperature part and for a hightemperature part and inputs them to a low temperature part cubic curvevoltage generation circuit 94 and a high temperature part cubic curvevoltage generation circuit 95, respectively.

Voltages individually outputted from the low temperature part cubiccurve voltage generation circuit 94, the high temperature part cubiccurve voltage generation circuit 95, the gradient correction voltagegeneration circuit 93, and a standard frequency adjustment voltagegeneration circuit 96 are inputted to an adding circuit 97 to be added,and outputted to a frequency adjustment circuit 98.

The frequency adjustment circuit 98 controls an oscillation frequency ofan oscillation circuit 99, having a crystal resonator 90 by the inputtedvoltage. Further, the frequency adjustment circuit 98 adjusts a standardoscillation frequency at a prescribed temperature by the voltageoutputted from the standard frequency adjustment voltage generationcircuit 96.

The cubic curve voltage generation circuit only generates a voltageobtained by cubing the inputted voltage, and thus it can only generate avoltage in a first quadrant which is half of a cubic curve in atwo-dimensional plane of the input voltage and the output voltage.

Hence, in order to obtain sequential cubic curve voltages, it isnecessary to use the low temperature part cubic curve voltage generationcircuit 94 which generates a cubic curve voltage by inverting the inputvoltage and the output voltage and the high temperature part cubic curvevoltage generation circuit 95 which generates a cubic curve voltage byan normal operation, and to add the respective output voltages.

This requires the high temperature part/low temperature part separationcircuit 92, the low temperature part cubic curve voltage generationcircuit 94, and the high temperature part cubic curve voltage generationcircuit 95.

In the above-described series of operations, the low temperature partcubic curve voltage generation circuit 94 and the high temperature partcubic curve voltage generation circuit 95 generate voltages such thatthe frequency adjustment circuit 98 compensates cubic temperaturecharacteristics of an AT cut crystal, and the gradient correctionvoltage generation circuit 93 generates a voltage such that thefrequency adjustment circuit 98 compensates linear temperaturecharacteristics of the AT cut crystal.

These voltages are added in the adding circuit 97 and inputted to thefrequency adjustment circuit 98, so as to compensate the oscillationfrequency of the oscillation circuit 99 changing due to temperature. Insuch a manner, the oscillation frequency of the temperature compensatedoscillator can be held constant, even if the temperature changes.

Such a conventional technique, however, has problems that since the hightemperature part/low temperature part separation circuit for separatingthe voltage from the temperature detection circuit for a low temperaturepart and a high temperature part, the two cubic curve voltage generationcircuits, the gradient correction voltage generation circuit, and theadding circuit are required in order to compensate the temperaturecharacteristics of the AT cut crystal as described above, the circuitincreases in size, and that the above circuits individually requirecomplicated adjustment in order to correct variations in fabrication.

Hence, it is an object of the present invention to solve the problemsand to provide a temperature compensated oscillator that has a simplecircuit configuration suitable for downsizing and requires just easyadjustment.

DISCLOSURE OF THE INVENTION

In order to attain the above object, a temperature compensatedoscillator according to the invention, which comprises: an oscillationcircuit; a frequency adjustment circuit for changing an oscillationfrequency of the oscillation circuit by a control voltage; a temperaturedetection circuit for detecting a temperature in the vicinity of theoscillation circuit and generating at least one output voltage based onthe detected temperature; and a control voltage generation circuitincluding a cubic term voltage generation circuit for generating a cubicterm voltage as the control voltage based on the output voltage from thetemperature detection circuit, is characterized in that the cubic termvoltage generation circuit is configured as follows:

Specifically, the cubic term voltage generation circuit comprises: afirst MOS transistor having a source connected to a first power line; asecond MOS transistor having a conduction type different from that ofthe first MOS transistor and a source connected to a second power line;and a first gate voltage generation circuit for generating a first gatevoltage and a second gate voltage generation circuit for generating asecond gate voltage respectively based on the output voltage of thetemperature detection circuit.

Further, an output terminal for outputting the first gate voltage of thefirst gate voltage generation circuit is connected to a gate of thefirst MOS transistor, an output terminal for outputting the second gatevoltage of the second gate voltage generating circuit is connected to agate of the second MOS transistor, and a drain of the first MOStransistor and a drain of the second MOS transistor are commonlyconnected to be an output terminal of the control voltage.

It is preferable that the second power line has a polarity opposite tothat of the first power line or is at the ground potential.

Further, in the case of a temperature compensated circuit in which thecontrol voltage generation circuit includes, in place of the cubic termvoltage generation circuit, a quadratic term voltage generation circuitfor generating a quadratic term voltage as the control voltage based onthe output voltage from the temperature detection circuit, only thefollowing points of the configuration of the cubic term voltagegeneration circuit should be changed to obtain a configuration of thequadratic term voltage generation circuit.

Specifically, the second MOS transistor has the same conduction type asthat of the first MOS transistor and a source is connected to the secondpower line.

The second power line in this case preferably has the same polarity asthat of the first power line or may be the same as the first power line.

In these temperature compensated oscillators, the output terminal of thecontrol voltage is preferably connected to at least one arbitraryvoltage source via a resistance element having a resistance value of 100kilohms or more.

In the case of the temperature compensated oscillator which comprisesthe control voltage generation circuit including the cubic term voltagegeneration circuit, it is preferable that the output terminal of thecontrol voltage is connected to the first power line or a power linehaving the same polarity as that of the first power line via a firstresistance element as well as to the second power line or a power linehaving the same polarity as that of the second power line via a secondresistance element.

It is possible to use resistance elements that are different intemperature coefficient with respect to resistance value as the firstresistance element and the second resistance element.

Further, it is preferable that a plurality of pairs of resistanceelements having different combinations of temperature coefficients withrespect to resistance values are provided as the first resistanceelement and the second resistance element, and switches for selectivelyswitching to any of the plurality of pairs of resistance elements foruse are provided.

In any of the temperature compensated oscillators, it is preferable thatat least one of the first and second gate voltage generation circuits isa circuit for generating the first or the second gate voltage based on adifference between the output voltage of the temperature detectioncircuit and an arbitrary reference voltage.

Alternatively, it is possible that at least one of the first and secondgate voltage generation circuits is a circuit capable of controlling thegenerated gate voltage thereof based on external data. Further, it isalso possible that a memory circuit for storing the external data isprovided, and at least one of the first and second gate voltagegeneration circuits is a circuit capable of controlling the generatedgate voltage thereof based on the data stored in the memory circuit.

It is adoptable that at least one of the first and second gate voltagegeneration circuits is a voltage division circuit for dividing a voltagedifference between the output voltage of the temperature detectioncircuit and the arbitrary reference voltage. The arbitrary referencevoltage may also be a voltage of the first power line or the secondpower line.

In the case of the temperature compensated oscillator which comprisesthe control voltage generation circuit including the cubic term voltagegeneration circuit, it is preferable that the control voltage generationcircuit outputs the cubic term voltage generated by the cubic termvoltage generation circuit as a first control voltage, further comprisesa linear term voltage generation circuit for generating a linear termvoltage based on the output voltage of the temperature detectioncircuit, and outputs the linear term voltage generated by the linearterm voltage generation circuit as a second control voltage, and thatthe frequency adjustment circuit is a circuit for controlling theoscillation frequency of the oscillation circuit by the first controlvoltage and the second control voltage.

The linear term voltage generation circuit may be an operationalamplifier circuit. Further, it is preferable that a memory circuit isprovided which stores data from the outside and controls anamplification factor and an offset input voltage of the operationalamplifier circuit based on the stored digital data.

Alternatively, the temperature detection circuit may also be a circuitwhich comprises two temperature sensors different in temperaturegradient and divides a difference between output voltages of the twotemperature sensors into an arbitrary ratio to output it as atemperature detection voltage.

It is preferable that the frequency adjustment circuit comprises avoltage variable capacitance element such as a MIS variable capacitor orthe like which constitutes a load capacitance of the oscillation circuitand of which capacitance value is changed by the control voltage. Inthis case, it is preferable that the first control voltage is applied toone electrode of the voltage variable capacitance element and the secondcontrol voltage is applied to another electrode thereof.

Alternatively, it is also possible that the voltage variable capacitanceelements are constituted by a first voltage variable capacitance elementto which the first control voltage is applied and a second voltagevariable capacitance element to which the second control voltage isapplied which are connected in parallel.

Further, it is preferable that each source of the first and second MOStransistors in the control voltage generation circuit is connected tothe first or second power line via a resistance element for limiting adrain current.

It is also adoptable that the resistance element is a digital controlvariable resistance circuit, and that a memory circuit is provided whichis capable of controlling a resistance value of the digital controlvariable resistance circuit based on digital data stored therein. It ispreferable that the memory circuit is capable of controlling storage andread of digital data from the outside via a serial input/output line.

It is possible to use temperature detection circuits having varioustypes of temperature sensors and circuit configurations such as one inwhich temperature and the output voltage are in a proportionalrelationship, one in which they are in an inversely proportionalrelationship, one in which a plurality of temperature gradients can beselected, and the like as the above-described temperature detectioncircuit.

Further, when a preset temperature range in a temperature range in useof each of the temperature compensated oscillators is defined as asecond temperature area, a temperature range on a lower temperature sidethan that is defined as a first temperature area, and a temperaturerange on a high temperature side exceeding the second temperature areais defined as a third temperature area, it is desirable to have aconfiguration as follows:

The first gate voltage generation circuit has an area in which the firstgate voltage linearly changes with respect to changes in temperature atleast in the third temperature area, and the second gate voltagegeneration circuit has an area in which the second gate voltage linearlychanges with respect to changes in temperature at least in the firsttemperature area.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a block circuit diagram showing a configuration of a firstembodiment of a temperature compensated oscillator according to thepresent invention;

FIG. 2 is a circuit diagram showing a specific configuration example ofa temperature detection circuit 13 in FIG. 1;

FIG. 3 is a block circuit diagram showing a specific configurationexample of an external control voltage input circuit 17 in FIG. 1;

FIG. 4 is a block circuit diagram showing a specific configurationexample of digital control voltage division circuits 31 and 33 in FIG.1;

FIG. 5 is a diagram showing a relationship between temperature and firstand second control voltages in the first embodiment of the invention;

FIG. 6 is a diagram showing a relationship between temperature and adifference between the first control voltage and the second controlvoltage of the same;

FIG. 7 is a diagram showing a relationship between the difference involtage and a rate of change in frequency of the same;

FIG. 8 is a diagram showing a relationship between temperature and arate of change in frequency of the same;

FIG. 9 is a circuit diagram showing another configuration example of atemperature detection circuit used in the invention;

FIG. 10 is a block circuit diagram showing still another configurationexample of a temperature detection circuit of the same;

FIG. 11 is a circuit diagram showing another configuration example of acircuit for generating the first control voltage in FIG. 1;

FIG. 12 is a circuit diagram showing still another configuration exampleof a circuit for generating the first control voltage of the same;

FIG. 13 is a circuit diagram showing the oscillation circuit shown inFIG. 1 and a partially modified frequency adjustment circuit;

FIG. 14 is a block circuit diagram showing another example of anexternal control voltage input circuit used in the invention;

FIG. 15 is a block circuit diagram showing a second embodiment of atemperature compensated oscillator according to the invention;

FIG. 16 is a diagram showing a relationship between temperature and afirst control voltage generated by a control voltage generation circuitof the same; and

FIG. 17 is a block diagram showing a configuration example of aconventional temperature compensated oscillator.

BEST MODE FOR CARRYING OUT THE INVENTION

In order to detail the present invention, preferred embodiments of theinvention will be explained using the accompanying drawings.

Configuration of a First Embodiment: FIG. 1 to FIG. 4

FIG. 1 is a block circuit diagram showing the configuration of the firstembodiment of a temperature compensated oscillator according to theinvention. The temperature compensated oscillator is constituted by apower supply 11, an input terminal 12, a control voltage generationcircuit 23, a temperature detection circuit 13, an external controlvoltage input circuit 17, a frequency adjustment circuit 45, anoscillation circuit 47, and a memory circuit 19.

The control voltage generation circuit 23 is constituted, as shown inFIG. 1, by an operational amplifier circuit 29, a P-channel MOStransistor 37, an N-channel MOS transistor 35, a first resistanceelement 39, a second resistance element 43, a third resistance element22, a fourth resistance element 20, digital control voltage divisioncircuits 31 and 33 constituting a first and a second gate voltagegeneration circuit, a digital control variable resistance circuit 21,and a resistance element 27.

Particularly, the P-channel MOS transistor 37, the N-channel MOStransistor 35, and the digital control voltage division circuits 31 and33 constitute a cubic term voltage generation circuit.

The frequency adjustment circuit 45 is constituted by MIS variablecapacitors 41 and 54, resistance elements 52, 53 and 59, and capacitanceelements 55, 57 and 58. The oscillation circuit 47 is constituted by acrystal resonator 49 being a piezoelectric resonator, an inverter 51,and a feedback resistance element 50. Each of the MIS variablecapacitors 41 and 54 is a capacitance element constituting a loadcapacitance of the oscillation circuit 47 and being a voltage variablecapacitance element of which capacitance value is changed by a controlvoltage.

The temperature detection circuit 13 is constituted, as shown in FIG. 2,by a power supply 100, a P-channel MOS transistor 105, resistanceelements 119 and 106, an operational amplifier circuit 111, and so on.The detailed configuration thereof is described later.

The power supply 100 of the temperature detection circuit 13 isunnecessary to be common with the power supply 11 of the control voltagegeneration circuit 23, and power is generally supplied from differentregulators in order to optimize power-supply voltages separately for thecircuits in an actual integrated circuit (IC). Specifically, the powersupply 11 shown in FIG. 1 is constituted by a regulator, and the powersupply 100 of the temperature detection circuit 13 shown in FIG. 2, apower supply (a later-described power supply 130 shown in FIG. 3) of theexternal control voltage input circuit 17, and a power supply of theoscillation circuit 47 are also constituted by separately providedregulators.

Therefore, in order to eliminate complication of the drawing in thisembodiment, the temperature detection circuit 13 in FIG. 1 is shown as acircuit including the power supply. This similarly applies to thelater-described external control voltage input circuit 17.

The external control voltage input circuit 17 is constituted, as shownin FIG. 3, by the power supply 130, operational amplifier circuits 137and 147, a digital control variable resistance circuit 141, a digitalcontrol voltage division circuit 139, and so on. The detail is describedlater.

The memory circuit 19 is constituted by a nonvolatile memory.Alternatively, the memory circuit 19 can be constituted by a one-timememory that is writable only once or a mask ROM being a read-onlymemory.

In the control voltage generation circuit 23 shown in FIG. 1, thedigital control voltage division circuits 31 and 33 are circuits eacharbitrarily divides a difference between voltages applied to bothterminals thereof based on a digital signal and outputs it.

For example, as shown in FIG. 4, a plurality of resistance elements R1to Rn are connected in series between voltage input terminals A and B,and switch elements SW1 to SWn are connected between respectiveconnection points and a voltage output terminal C, so that one or aplurality of the switch elements SW1 to SWn is/are selectively turned onby a digital signal from the memory circuit 19, thereby outputting tothe voltage output terminal C a voltage obtained by arbitrarily dividinga voltage applied between the voltage input terminals A and B.

Further, both terminals (the voltage input terminals A and B in FIG. 4)of one digital control voltage division circuit 31 shown in FIG. 1 areconnected to a positive power line 25 (whose voltage shall be areference voltage) which is connected to a positive terminal of thepower supply 11 of the control voltage generation circuit 23 and anoutput voltage line 15 of the temperature detection circuit 13,respectively. Both terminals (the voltage input terminals A and B inFIG. 4) of the other digital control voltage division circuit 33 areconnected to the output voltage line 15 of the temperature detectioncircuit 13 and a ground power line (or a negative power line) 26 whichis connected to a negative terminal of the power supply 11 and theground, respectively.

It should be noted that the reference voltages applied to the digitalcontrol voltage division circuits 31 and 33 are not required to be thevoltages of the positive power line 25 and the ground power line 26, anda voltage from an arbitrary power supply can be used.

Moreover, the digital control voltage division circuits 31 and 33 arethe first and second gate voltage generation circuits and dividerespective voltage differences based on differences between the outputvoltage of the temperature detection circuit 13 and the respectivereference voltages to generate a first and a second gate voltage in thisembodiment, but the arrangement is not limited to the above.

The divided voltage output of the digital control voltage divisioncircuit 31 is inputted to a gate G1 of the P-channel MOS transistor 37as the first gate voltage via a signal line 36 connected to the voltageoutput terminal C in FIG. 4, and the divided voltage output of thedigital control voltage division circuit 33 is inputted to a gate G2 ofthe N-channel MOS transistor 35 as the second gate voltage via a similarsignal line 30.

The digital control voltage division circuit 31 constitutes the firstgate voltage generation circuit, and the digital control voltagedivision circuit 33 constitutes the second gate voltage generationcircuit.

Further, a source S1 of the P-channel MOS transistor 37 is connected tothe positive power line 25 of the control voltage generation circuit 23via the third resistance element 22, and a source S2 of the N-channelMOS transistor 35 is connected to the ground power line 26 of thecontrol voltage generation circuit 23 via the fourth resistance element20.

Furthermore, a drain D1 of the P-channel MOS transistor 37 is connectedto the positive power line 25 via the first resistance element 39, and adrain D2 of the N-channel MOS transistor 35 is connected to the groundpower line 26 via the second resistance element 43. The drain D1 of thep-channel MOS transistor 37 and the drain D2 of the N-channel MOStransistor 35 are connected to each other to form a drain connectionpoint 44.

In this embodiment, the positive power line 25 is a first power line ata first potential, and the ground power line 26 is a second power linehaving a polarity opposite to that of the first power line or being atthe ground potential. Therefore, the second power line might be anegative power line that is connected to the negative terminal of thepower supply 11 but not grounded.

In FIG. 1, a first control voltage Vo1 outputted from the drainconnection point 44 of the control voltage generation circuit 23 and asecond control voltage Vo2 outputted from the operational amplifiercircuit 29 are inputted to the frequency adjustment circuit 45 via asignal line 46 and a signal line 48, respectively.

In the temperature detection circuit 13 shown in FIG. 2, a gate G3 ofthe P-channel MOS transistor 105 is connected to a positive power line103 of the temperature detection circuit 13 via a resistance element 101as well as to a ground power line 121 via a resistance element 115. Thepositive power line 103 is connected to a positive terminal of the powersupply 100, and the ground power line 121 is connected to a negativeterminal of the power supply 100 and the ground, respectively.

Further, a source S3 of the P-channel MOS transistor 105 is connected tothe positive power line 103 of the temperature detection circuit 13 viathe resistance element 106, and a drain D3 thereof is connected to theground power line 121 via the resistance element 119.

An output voltage at a connection point 120 between the resistanceelement 119 and the drain D3 of the P-channel MOS transistor 105 isinputted to a negative input terminal of the operational amplifiercircuit 111 via a resistance element 107, and the negative inputterminal of the operational amplifier circuit 111 is connected to anoutput terminal of the operational amplifier circuit 111 itself via aresistance element 109. Furthermore, a positive input terminal of theoperational amplifier circuit 111 is connected to the positive powerline 103 via a resistance element 124 as well as to the ground powerline 121 via a resistance element 123 respectively to input an offsetvoltage thereto.

The output voltage of the operational amplifier circuit 111 is atemperature detection voltage, which is inputted, as described above, tothe digital control voltage division circuits 31 and 33 via the signalline 15 as well as to a negative input terminal of the operationalamplifier circuit 29 via the resistance element 27, as the outputvoltage of the temperature detection circuit 13 shown in FIG. 1. Thenegative input terminal of the operational amplifier circuit 29 isconnected to an output terminal 28 of the operational amplifier circuit29 itself via the digital control variable resistance circuit 21.

In the temperature detection circuit 13 shown in FIG. 2, the resistanceelements 101 and 115 constitute a gate voltage generator for theP-channel MOS transistor 105. Further, the positive power line 103 is afirst power line, and the ground power line 121 is a second power linehaving a polarity opposite to that of the first power line or being atthe ground potential.

Since a voltage produced across the resistance element 106 is appliedhaving a polarity opposite to that of the voltage between the gate G3and the source S3 (a so-called gate voltage) of the P-channel MOStransistor, the voltage have an action of reducing a drain current ofthe P-channel MOS transistor 105. This action becomes more prominent asthe drain current (as well as a source current) of the P-channel MOStransistor 105 increases to exert a kind of negative feedback action onthe drain current of the P-channel MOS transistor 105, which presentseffects of not only improving the linearity of the drain current of theP-channel MOS transistor 105 to the temperature but also restraininginfluence on variation in fabrication thereof.

The output voltage of the operational amplifier circuit 111 is outputtedas the temperature detection voltage of the temperature detectioncircuit 13 in this embodiment, but not limited to that, and it is alsoadoptable to output, for example, the voltage generated at theconnection point 120 between the resistance element 119 and the drain D3of the P-channel MOS transistor 105, as it is, as the temperaturedetection voltage of the temperature detection circuit 13.

In the external control voltage input circuit 17 shown in FIG. 3, anexternal voltage is inputted from the input terminal 12 to a negativeinput terminal of the operational amplifier circuit 137 via a resistanceelement 131, and the negative input terminal of the operationalamplifier circuit 137 is connected to an output terminal of theoperational amplifier circuit 137 itself via the digital controlvariable resistance circuit 141.

Further, a positive input terminal of the operational amplifier circuit137 is connected to a positive power line 132 of the external controlvoltage input circuit 17 via a resistance element 133 as well as to aground power line 138 via a resistance element 135 to input an offsetvoltage thereto.

An output of the operational amplifier circuit 137 is inputted to anegative input terminal of the operational amplifier circuit 147 via aresistance element 143, and the negative input terminal of theoperational amplifier circuit 147 is connected to an output terminal ofthe operational amplifier circuit 147 itself via a resistance element145. An output of the operational amplifier circuit 147 is an output ofthe external control voltage input circuit 17 and is inputted as anoffset voltage to a positive input terminal of the operational amplifiercircuit 29 of the control voltage generation circuit 23 shown in FIG. 1via a signal line 16.

In this embodiment, the resistance elements 133 and 135 shown in FIG. 3constitute an offset voltage generator for the operational amplifiercircuit 137.

A voltage range of the external voltage is prescribed in accordance withspecifications of a product, and if an external voltage in theprescribed voltage range is inputted as it is as the offset voltage ofthe operational amplifier circuit 29, it is impossible to obtain adesired variation in frequency because the external voltage poorlymatches with a voltage value required by the control voltage generationcircuit 23. Therefore, the variation range of the external voltage isgenerally compressed, and an appropriate offset is added if necessary.The adjustment of the compression rate and the addition of the offsetare performed in the external control voltage input circuit 17. Theprinciple of operation thereof will be detailed later.

Both terminals of the digital control voltage division circuit 139 whichhas the same function as that of the above-described digital controlvoltage division circuits 31 and 33 are connected to the positive powerline 132 and the ground power line 138 of the external control voltageinput circuit 17, and a divided voltage output of the digital controlvoltage division circuit 139 is inputted to a positive input terminal ofthe operational amplifier circuit 147 as an offset voltage via a signalline 140.

In this embodiment, the offset input voltage to the operationalamplifier circuit 147 is adjusted by the divided voltage output of thedigital control voltage division circuit 139.

In the frequency adjustment circuit 45 shown in FIG. 1, the firstcontrol voltage Vo1 of the control voltage generation circuit 23 isinputted to a gate electrode that is one of electrodes of the MISvariable capacitor 41 via the signal line 46 and the resistance element52 as well as to a gate electrode of the MIS variable capacitor 54 viathe signal line 46 and the resistance element 53.

Further, the second control voltage Vo2 of the control voltagegeneration circuit 23 is inputted to substrate electrodes that are therespective other electrodes of the MIS variable capacitors 41 and 54 viathe signal line 48 and the resistance element 59.

The gate electrodes of the MIS variable capacitors 41 and 54 areconnected to the oscillation circuit 47 via the capacitance element 58or 57 respectively, and the respective substrate electrodes are grounded(connected to the ground power line) via the capacitance element 55.

The oscillation circuit 47 is a crystal oscillation circuit in which theresistance element 50 and the crystal resonator 49 are connected inparallel between an input terminal and an output terminal of theinverter 51, and both terminals of the crystal resonator 49 areconnected to the capacitance elements 58 and 57 of the frequencyadjustment circuit 45, respectively.

The memory circuit 19 is connected with a serial input/output line 18that controls memory and read of digital data, and three parallel outputlines 14 a, 14 b and 14 c each of which outputs digital data.

Operation of the First Embodiment: FIG. 1 to FIG. 8

Next, the operation of the above-described temperature compensatedoscillator is explained with reference also to FIG. 5 to FIG. 8 inaddition to FIG. 1 to FIG. 4 which have been already explained.

In FIG. 1, the temperature detection circuit 13 detects the temperatureof the oscillation circuit 47, and outputs a voltage depending on thetemperature to the control voltage generation circuit 23.

Hence, first of all, explanation is made on the principle of operationof generating the above-described first control voltage Vo1 by thecontrol voltage generation circuit 23.

In the temperature detection circuit 13, a voltage, which is obtained bydividing a power-supply voltage between the positive power line 103 andthe ground power line 121, generated by the power supply 100 of thetemperature detection circuit 13, by the resistance elements 101 and115, is inputted to the gate G3 of the P-channel MOS transistor 105shown in FIG. 2 in order to pass an electric current through the drainD3. Then, as the temperature changes from a low temperature to a hightemperature, the drain current of the p-channel MOS transistor 105increases and the voltage at the connection point 120 between theresistance element 119 and the drain D3 linearly increases.

Since the voltage at the connection point 120 is inputted to thenegative input terminal of the operational amplifier circuit 111 via theresistance element 107, the operation of the operational amplifiercircuit 111 becomes inverse amplification and its output voltagelinearly drops with increases in temperature.

To the positive input terminal of the operational amplifier circuit 111,a voltage obtained by dividing the power-supply voltage of thetemperature detection circuit 13 by the resistance elements 124 and 123is inputted as an offset voltage.

It should be noted that it is also possible to replace the resistanceelement 106 connected between the source S3 of the P-channel MOStransistor 105 and the positive power line 103 with a digital controlvariable resistance circuit to form a complete unit, and then to controlthe drain current of the P-channel MOS transistor 105 by digital datastored in the memory circuit 19.

The memory circuit 19 shown in FIG. 1, whose storage and read of thedigital data are controlled from the outside via the serial input/outputline 18, outputs the digital data for control to the digital controlvariable resistance circuit 21 of the control voltage generation circuit23 and to the digital control voltage division circuits 31 and 33 viathe parallel output lines 14 a to 14 c.

As described above, the output voltage of the temperature detectioncircuit 13 linearly drops with increases in temperature, so that avoltage difference between the output voltage of the temperaturedetection circuit 13 and the voltage (0 V) of the ground power line 26of the control voltage generation circuit 23 decreases.

This voltage difference is divided into a desired value by the digitalcontrol voltage division circuit 33 and inputted to the gate G2 of theN-channel MOS transistor 35 as a gate input voltage. When thetemperature increases from a low level to reach a temperature T1 shownin FIG. 5 so that the gate input voltage becomes a threshold valuevoltage or lower of the N-channel MOS transistor 35, the electriccurrent flowing between the source S2 and the drain D2 thereof isinterrupted. A temperature range up to the temperature T1 is a firsttemperature area TA1, in which while the N-channel MOS transistor 35 isin an ON state, the P-channel MOS transistor 37 is in an OFF state.

On the other hand, as the temperature increases, the voltage differencebetween the output voltage of the temperature detection circuit 13 andthe voltage of the positive power line 25 of the control voltagegeneration circuit 23 linearly increases, conversely.

This voltage difference is divided into a desired value by the digitalcontrol voltage division circuit 31 and inputted to the gate G1 of thep-channel MOS transistor 37 as a gate input voltage. When thetemperature reaches a temperature T2 shown in FIG. 5 so that the gateinput voltage exceeds a threshold value voltage of the P-channel MOStransistor 37, an electric current begins flowing between the source S1and the drain D1 thereof.

The voltage division ratios of the digital control voltage divisioncircuits 31 and 33 are set by the digital data stored in the memorycircuit 19 so that the temperature T2 is higher than the temperature T1and values of the temperature T1 and the temperature T2 are desiredvalues.

The temperature T1 is set in the vicinity of a maximum point (−10degrees to 0 degrees) on a low temperature side of an AT cut crystalresonator, and the temperature T2 is set in the vicinity of a minimumpoint (60 degrees to 70 degrees) on a high temperature side of the ATcut crystal resonator. A temperature range from the temperature T1 tothe temperature T2 is a second temperature area TA2, in which both theP-channel MOS transistor 37 and the N-channel MOS transistor 35 are inthe OFF states. Since, the AT cut crystal resonator substantiallylinearly varies in frequency in a temperature area between the aforesaidmaximum and minimum points, temperature compensation is conducted to theoscillation frequency of the oscillation, circuit 47 only by a variationin the aforesaid second control voltage Vo2 in this second temperaturearea TA2.

Both resistance values of the first resistance element 39 and the secondresistance element 43 are preferably set to be 100 kilohms (KΩ) or more.If the resistance values are lower than 100 KΩ, the electric currentconsumed by the control voltage generation circuit 23 increases as wellas influence of the P-channel MOS transistor 37 and the N-channel MOStransistor 35 in the ON states exerted on their equivalent resistancescan not be ignored. As a result, saturation of voltage is generated atpoints of the first control voltage Vo1 at the maximum temperature andthe minimum temperature, so that a voltage curve generated at the drainconnection point 44 deforms, i.e., it becomes impossible to obtain adesired voltage curve at which temperature characteristics of the AT cutcrystal resonator can be sufficiently compensated.

Until the temperature reaches T1 (in the first temperature area TA1) inFIG. 5, the electric current flowing between the source S1 and the drainD1 of the P-channel MOS transistor 37 is interrupted, and thus theelectric current flowing through the second resistance element 43 isvery small as compared to the electric current flowing between thesource S2 and the drain D2 of the N-channel MOS transistor 35.Therefore, the electric current flowing from the positive power line 25of the control voltage generation circuit 23 into the first resistanceelement 39 is substantially equal to the electric current flowingbetween the source S2 and the drain D2 of the N-channel MOS transistor35.

Since the first control voltage Vo1 generated at the connection point 44between the drain D1 of the P-channel MOS transistor 37 and the drain D2of the N-channel MOS transistor 35 is a voltage obtained by subtractinga voltage produced across the first resistance element 39 from thevoltage of the positive power line 25 of the control voltage generationcircuit 23, the changes in the first control voltage Vo1 with respect totemperatures present a curve projecting upward in accordance with therelation between the gate voltage and the drain current of the N-channelMOS transistor 35, that is, in conformity with a so-called square law.

In a part of the temperature between T1 and T2 in FIG. 5 which is thesecond temperature area TA2, since both the N-channel MOS transistor 35and the P-channel MOS transistor 37 are in states of being interruptedand no electric current flows between the sources and the drainsthereof, the first control voltage Vo1 generated at the connection point44 is a value obtained by dividing the power-supply voltage by the powersupply 11 by a resistance ratio between the first resistance element 39and the second resistance element 43.

For example, if the resistance values of the first resistance element 39and the second resistance element 43 are set equal, the value of thefirst control voltage Vo1 becomes half the value of the power supplyvoltage.

Further, when the temperature increases to exceed T2 in FIG. 5 into athird temperature area TA3, the P-channel MOS transistor 37 turns intothe ON state while the N-channel MOS transistor 35 is kept in theinterrupted state. Therefore, the electric current flowing through thefirst resistance element 39 becomes very small as compared to theelectric current flowing between the source S1 and the drain D1 of theP-channel MOS transistor 37, and the electric current flowing into theground power line 26 via the second resistance element 43 becomessubstantially equal to the electric current flowing between the sourceS1 and the drain D1 of the P-channel MOS transistor 37.

Accordingly, since the first control voltage Vo1 generated at the drainconnection point 44 is a voltage produced across the second resistanceelement 43, the changes in the first control voltage Vo1 with respect totemperatures present a curve projecting downward in accordance with therelation between the gate voltage and the drain current of the P-channelMOS transistor, that is, in conformity with the so-called square law.

Therefore, an appearance of changes in the first control voltage Vo1generated at the drain connection point 44 with respect to changes intemperature becomes like a curved line 60 in a diagram shown in FIG. 5.In the drawing, temperature is plotted on the abscissa axis and thecontrol voltage is plotted on the ordinate axis.

Of the curved line 60, a range below the temperature T1 (the firsttemperature area TA1) corresponds to a curved line part 67, a range fromthe temperature T1 to the temperature T2 (the second temperature areaTA2) corresponds to a curved line part 65, and a range exceeding thetemperature T2 (the third temperature area TA3) corresponds to a curvedline part 61 to form a cubic term voltage. It should be noted that alinear line 63 shows a linear term voltage being the later-describedsecond control voltage Vo2.

The changes in the first control voltage Vo1 are, as shown by the curvedline 60, generated by the square law of the MOS transistor in principle,but they become a curved line being an approximate cubic curve which iscontinuous with respect to temperatures, and thus it is unnecessary togenerate the voltage separately for the low temperature part and thehigh temperature part.

Hence, if the values of the temperature T1 and the temperature T2 areappropriately selected, an error to an actual cubic curve becomes 10 mVor lower, which makes it possible to sufficiently compensate cubictemperature characteristics of the AT cut crystal.

It should be noted that the digital control voltage division circuit 31being the first gate voltage generation circuit shown in FIG. 1 changesthe first gate voltage outputted to the gate G1 of the P-channel MOStransistor 37 linearly with respect to changes in temperature at leastin the third temperature area TA3. Further, the digital control voltagedivision circuit 33 being the second gate voltage generation circuitchanges the second gate voltage outputted to the gate G2 of theN-channel MOS transistor 35 linearly with respect to changes intemperature at least in the first temperature area TA1.

Furthermore, the third resistance element 22 in FIG. 1 exerts the sameaction as the action which has been explained on the resistance element106 connected to the source S3 of the P-channel MOS transistor 105 shownin FIG. 2 of the temperature detection circuit 13, and presents aneffect like a negative feedback of limiting the drain current of theP-channel MOS transistor 37. Accordingly, by adjusting the resistancevalue of the third resistance element 22, it becomes possible to controlthe rate of change in the voltage across the first resistance element 39produced by the drain current of the P-channel MOS transistor 37 withrespect to temperature. Thereby, if there are variation in properties ofthe MOS transistors 37 and 35, adjustment can be conducted so that anapproximate error in compensating the cubic temperature characteristicsof the AT cut crystal becomes smaller.

The fourth resistance element 20 also exerts the same action as that ofthe above-described third resistance element 22 on the drain current ofthe N-channel MOS transistor 35.

Further, it is also possible to replace the third resistance element 22and the fourth resistance element 20 with digital control variableresistance circuits to form a complete unit, and then to perform theabove-described adjustment by the digital data stored in the memorycircuit 19. In this case, the resistance value of the third resistanceelement 22 is adjusted so that the oscillation frequency of theoscillation circuit 47 becomes a desired value at a maximum temperaturefor temperature compensation, and the resistance value of the fourthresistance element 20 is adjusted so that the oscillation frequency ofthe oscillation circuit 47 becomes a desired value at a minimumtemperature for temperature compensation.

Temperature compensation can be conducted without using the resistanceelements 20 and 22, but, in this case, the curve shape of the firstcontrol voltage Vo1 is determined only by the aforesaid temperatures T1and T2, which makes it difficult to sufficiently absorb variations intemperature characteristics of individual crystal resonators.

While the example in which only one temperature detection circuit 13 isused and its output voltage is inputted to the digital control voltagedivision circuits 31 and 33 is explained in this embodiment, the sameeffect can be obtained also by inputting output voltages of differenttemperature detection circuits into the digital control voltage divisioncircuits 31 and 33.

Next, explanation is made on the principle of operation of generatingthe second control voltage Vo2 by the control voltage generation circuit23.

As the temperature changes from a low temperature to a high temperature,the output voltage of the temperature detection circuit 13 linearlydrops as in the above explanation. Since the output voltage of thetemperature detection circuit 13 is inputted to the negative inputterminal of the operational amplifier circuit 29 via the resistanceelement 27, the operation of the operational amplifier circuit 29becomes inverse amplification and its output voltage linearly increaseswith increases in temperature. Accordingly, the second control voltageVo2 generated at the output terminal 28 of the operational amplifiercircuit 29 linearly increases with increases in temperature.

A gradient of the linear change in this event depends on anamplification factor of the operational amplifier circuit 29, and theamplification factor of the operational amplifier circuit 29 isdetermined by a ratio between a resistance value of the digital controlvariable resistance circuit 21 inserted between the negative inputterminal and the output terminal of the operational amplifier circuit 29and a resistance value of the resistance element 27. Therefore, forchanging the gradient of the second control voltage Vo2 with respect tochanges in temperature, the resistance value of the digital controlvariable resistance circuit 21 should be changed by the digital datastored in the memory 19.

An appearance of changes in the second control voltage Vo2 generated atthe output terminal 28 of the operational amplifier circuit 29 withrespect to temperatures is the linear term voltage shown by the straightline 63 in the diagram shown in FIG. 5, in which temperature is plottedon the abscissa axis and the control voltage is plotted on the ordinateaxis.

Next, an operation of adding the above-described first control voltageVo1 and second control voltage Vo2 by the frequency adjustment circuit45 is explained.

The first control voltage Vo1 is inputted to the gate electrode that isone of electrodes of the MIS variable capacitor 41 of the frequencyadjustment circuit 45 via the resistance element 52 for preventing ahigh frequency current from flowing out as well as to the gate electrodeof the MIS variable capacitor 54 similarly via the resistance element53.

The second control voltage Vo2 is inputted to the substrate electrodeswhich are the respective other electrodes of the MIS variable capacitors41 and 54 via the resistance element 59 for preventing a high frequencycurrent from flowing out.

The capacitance elements 57 and 58 are inserted to interrupt adirect-current voltage on the inverter side of the oscillation circuit47, and the capacitance element 55 is an element for interrupting onlythe direct current to ground the MIS variable capacitors 41 and 54 in ahigh frequency range.

Since the first control voltage Vo1 is inputted to the gate electrodesof the MIS variable capacitors 41 and 54 and the second control voltageVo2 is inputted to the substrate electrodes thereof as described above,the voltage applied to the MIS variable capacitors 41 and 54 is avoltage obtained by subtracting the second control voltage Vo2 from thefirst control voltage Vo1. Therefore, since the gradient of the secondcontrol voltage Vo2 has an effect in the opposite manner to the firstcontrol voltage Vo1, the straight line 63 of the second control voltageVo2 having a positive gradient shown in FIG. 5 acts as a negativegradient on the curved line 60 of the first control voltage Vo1.

An appearance of changes in difference between the voltages applied toboth electrodes of the MIS variable capacitors 41 and 54 (the firstcontrol voltage Vo1—the second control voltage Vo2) with respect totemperatures becomes like a curved line 71 shown in a diagram in FIG. 6,in which temperature is plotted on the abscissa axis and the controlvoltage is plotted on the ordinate axis. As is clear also from itsshape, the curved line 71 is a curved line approximate to a curved lineobtained by adding a linear line with a negative gradient to a cubicline.

As described above, it is possible to easily add the first controlvoltage Vo1 which approximates a cubic curve with respect totemperatures and the second control voltage Vo2 having a linear gradientwith respect to temperatures without requiring a specific addingcircuit.

Next, the principle of operation of adjusting the offset voltage isexplained.

The output of the operational amplifier circuit 147 shown in FIG. 3 ofthe external control voltage input circuit 17 in FIG. 1 is inputted asthe offset voltage to the positive input terminal of the operationalamplifier circuit 29 of the control voltage generation circuit 23. Sincethe output voltage of the operational amplifier circuit 29 changes inaccordance with the offset input voltage, the output voltage of theoperational amplifier circuit 29 changes in accordance with the outputvoltage of the operational amplifier circuit 147.

Since the output voltage of the operational amplifier circuit 29 is thesecond control voltage Vo2, as a result, the second control voltage Vo2changes in accordance with the output voltage of the operationalamplifier circuit 147.

The output voltage of the operational amplifier circuit 147 changes inaccordance with both of the input voltage to the negative input terminalthereof and the input voltage to the positive input terminal thereof(the offset voltage). In other words, the output voltage of theoperational amplifier circuit 147 changes in accordance with both of theoutput voltage of the operational amplifier circuit 137 and the dividedvoltage output of the digital control voltage division circuit 139.

The output voltage of the operational amplifier circuit 137 also changesin accordance with both of the input voltage to the negative inputterminal thereof and the input voltage to the positive input terminal(the offset input voltage). However, since the offset input voltage is afixed voltage obtained by dividing the power-supply voltage by the powersupply 130 by the resistance elements 133 and 135, the output voltage ofthe operational amplifier circuit 137 changes depending only on theexternal input voltage from the input terminal 12. The offset inputvoltage of the operational amplifier circuit 137 serves a function ofadding an offset to the output voltage of the operational amplifiercircuit 137 which changes by the external input voltage.

As a result, the second control voltage Vo2 changes due to both of theexternal input voltage from the input terminal 12 and the dividedvoltage output of the digital control voltage division circuit 139.

Hence, it is possible to adjust a standard oscillation frequency of thetemperature compensated oscillator in fabrication by controlling thedivided voltage output of the digital control voltage division circuit139 by the digital data stored in the memory circuit 19 to change thesecond control voltage Vo2.

When using the temperature compensated oscillator, a customer inputs anexternal input voltage called an AFC input voltage into the inputterminal 12 to adjust the oscillation frequency of the temperaturecompensated oscillator to a desired value. In this event, it is possibleto set the compression rate of the variation range of the external inputvoltage by controlling the resistance value of the digital controlvariable resistance circuit 141 by the digital data stored in the memorycircuit 19 to change the amplification factor of the operationalamplifier circuit 137.

The external input voltage inputted to the input terminal 12 of theexternal control voltage input circuit 17 shown in FIG. 3 is inverselyamplified twice in two operational amplifier circuits, that is, theoperational amplifier circuits 137 and 147, so that the external inputvoltage, the output voltage of the operational amplifier circuit 147,and the second control voltage Vo2 change in the same direction.

When the directions of the changes in the external input voltage and thesecond control voltage Vo2 are made opposite to each other, the numberof operational amplifier circuits constituting the external controlvoltage input circuit 17 should be odd numbers. Whether the number ofoperational amplifier circuits is set to be even numbers or odd numbersis decided at the time of adjusting the directions of the change in theexternal input voltage and the change in the oscillation frequency to bethe same or opposite.

Next, the principle of operation of the frequency adjustment circuit 45is explained.

The MIS variable capacitors 41 and 54 constituting the frequencyadjustment circuit 45 function as a load capacitance of the crystalresonator constituting the oscillation circuit 47, and thus whencapacitance values of the MIS variable capacitors 41 and 54 change, theoscillation frequency changes.

Since the MIS variable capacitors 41 and 54 change in capacitance valuedepending on the difference between the control voltages applied to bothelectrodes thereof, as a result, the oscillation frequency of theoscillation circuit 47 can be controlled by the difference between thevoltages applied to both electrodes of the MIS variable capacitors 41and 54.

An appearance of changes in difference between the voltages applied toboth electrodes of the MIS variable capacitors 41 and 54 and changes inthe oscillation frequency becomes like a curved line 73 shown in adiagram in FIG. 7, in which the difference between the voltages isplotted on the abscissa axis and the rate of change in frequency isplotted on the ordinate axis. As is clear from this drawing, withrespect to increases in the positive direction of the difference betweenthe voltages applied to both electrodes of the MIS variable capacitors41 and 54, the oscillation frequency decreases and the sign of the rateof change in the oscillation frequency changes from the positive sign tothe negative sign.

It should be noted that while the changes appear in the aforementioneddirection since a case in which the MIS variable capacitors 41 and 54are provided on an N-type silicon substrate is taken as an example inthis embodiment, the changes appear in an opposite direction theretowhen the MIS variable capacitors 41 and 54 are provided on a P-typesilicon substrate.

Specifically, with respect to increases in the positive direction of thedifference between the voltages applied to both electrodes of the MISvariable capacitors 41 and 54, the oscillation frequency increases andthe sign of the rate of change in the oscillation frequency changes fromthe negative sign to the positive sign.

As described in the explanation on the relation between the externalinput voltage inputted to the input terminal 12, the output voltage ofthe operational amplifier circuit 147, and the second control voltageVo2 in FIG. 3, the external input voltage, the output voltage of theoperational amplifier circuit 147, and the second control voltage Vo2change in the same direction. Further, since their increases in voltageact on the MIS variable capacitors 41 and 54 in a direction to decreasethe difference between the voltages applied to both electrodes thereof,the external input voltage and the oscillation frequency of thetemperature compensated oscillator proportionally change.

A middle part of the curved line 73 shown in FIG. 7 is a substantiallystraight line, and thus when the adjustment of the frequency isconducted with a difference in this range, the difference between thevoltages applied to both electrodes of the MIS variable capacitors 41and 54 and the rate of change in the oscillation frequency have asubstantially linear relationship.

Therefore, when differences between the voltages shown by the curvedline 71 in FIG. 6 are applied with respect to temperatures, anappearance of the rates of change in the frequency with respect to thetemperatures becomes like a curved line 75 in a diagram shown in FIG. 8,in which temperature is plotted on the abscissa axis and the rate ofchange in frequency is plotted on the ordinate axis.

The shape of the curved line is opposite, with respect to a temperatureaxis, to that of characteristics of the frequency change rates withrespect to temperatures of the AT cut crystal resonator, so that thetemperature characteristics of the AT cut crystal resonator can becompensated.

Modification of the First Embodiment: FIG. 9 to FIG. 14

An embodiment in which a part of the above-described first embodiment ismodified is explained here.

While the temperature detection circuit 13 in which the P-channel MOStransistor is used, and temperature and the output voltage are in aninversely proportional relationship is used in the first embodiment, thesame effect can be obtained even if an N-channel MOS transistor is used.

For example, a circuit example of the above is shown in FIG. 9. Atemperature detection circuit 13′ has the same circuit configuration asthat of the temperature detection circuit 13 shown in FIG. 2 except thatan N-channel MOS transistor 125 is used in place of the P-channel MOStransistor 105, and thus elements corresponding to those in FIG. 2 areassigned the same numerals and symbols.

In the temperature detection circuit 13′, a gate G4 of the N-channel MOStransistor 125 is connected to the connection point between theresistance elements 115 and 101 which are connected in series betweenthe positive power line 103 and the ground power line 121 of the powersupply 100. A source S4 is connected to the ground power line 121 viathe resistance element 106, and a drain D4 is connected to the positivepower line 103 via the resistance element 119, so that the outputvoltage at a connection point 120 between the resistance, element 119and the drain D4 of the N-channel MOS transistor 125 is inputted to thenegative input terminal of the operational amplifier circuit 111 via theresistance element 107. The other configuration and operation are thesame as those of the temperature detection circuit 13 shown in FIG. 2,and thus the description thereof is omitted. Moreover, the outputvoltage of the operational amplifier circuit 111 is an output of thetemperature detection circuit 13′, and temperature and the outputvoltage are in a proportional relationship.

Further, instead of generating the second control voltage Vo2 by thetemperature detection circuit 13 and the operational amplifier circuit29 in FIG. 1, it is possible to use, as shown in FIG. 10, a temperaturedetection circuit 160 having two temperature sensors 155 and 158 whichare different in temperature gradient.

The temperature detection circuit 160 divides a difference betweenoutput voltages of the two temperature sensors 155 and 158 by a voltagedivision circuit 159 into an arbitrary ratio, so as to make it possibleto select an arbitrary temperature gradient between the temperaturegradients of the two temperature sensors 155 and 158. An output voltageof the voltage division circuit 159 is used as the second controlvoltage Vo2. The division ratio by the voltage division circuit 159 canbe changed by the digital signal from the memory circuit 19.

Further, even if a resistance element 213 and a resistance element 215which are different in temperature coefficient with respect toresistance value as shown in FIG. 11 are used in place of the firstresistance element 39 and the second resistance element 43 in FIG. 1,the same effect can be obtained.

In other words, since the first control voltage Vo1 is a value obtainedby dividing the power-supply voltage of the control voltage generationcircuit 23 by the resistance element 213 and the resistance element 215in the above-described second temperature area (the temperature area TA2in FIG. 5), the first control voltage Vo1 linearly changes with respectto changes in temperature when the resistance element 213 and theresistance element 215 are different in temperature coefficient withrespect to resistance value. In this event, for changing the temperaturegradient, what is required is to prepare a plurality of pairs, each pairbeing constituted by two resistance elements, having differentcombinations of temperature coefficients with respect to resistancevalues, and to switch therebetween by switches.

In the example shown in FIG. 11, any pair of three pairs of resistanceelements 213 and 215, 219 and 221, and 225 and 227 which have differentcombinations of temperature coefficients with respect to resistancevalues is selectively switched for use by turning on/off three switches211, 217 and 223 which are switching means. It is also possible toconduct ON/OFF controls of these switches 211, 217 and 223 by thedigital signal from the memory circuit.

When switching transistors are, used in place of the switches 211, 217and 223, it is preferable to insert switching transistors 231, 233 and235 between the positive power line 25 and the resistance elements 213,219 and 225, respectively, and to insert switching transistors 232, 234and 236 between the ground power line 26 and the resistance elements215, 221 and 227, respectively as shown in FIG. 12. This makes itpossible to decrease ON resistances of the switching transistors.

Furthermore, in this case, a control voltage for each of the switchingtransistors 231 to 236 is supplied from a regulator circuit, which makesit possible to prevent the ON resistances of the switching transistorsfrom varying due to a variation in the power-supply voltage.

Furthermore, it is also adoptable to use a frequency adjustment circuit45′ shown in FIG. 13 in place of the frequency adjustment circuit 45shown in FIG. 1. In FIG. 13, the same portions as those of the frequencyadjustment circuit 45 in FIG. 1 are assigned the same numerals andsymbols.

In the frequency adjustment circuit 45′, series circuits composed ofsecond MIS variable capacitors 151 and 153 with respective capacitanceelements 152 and 154 are provided in parallel to series circuitscomposed of the MIS variable capacitors 41 and 54 with the respectivecapacitance elements 58 and 57, respectively.

In this case, the first control voltage Vo1 is applied to each of thegate electrodes of the MIS variable capacitors 41 and 54 via the signalline 46 and the resistance element 52 or 53 as in the first embodimentshown in FIG. 1, but the second control voltage Vo2 is applied to eachof gate electrodes of the second MIS variable capacitors 151 and 153 viathe signal line 48 and a resistance element 156 or 157. Also in thisarrangement, the same result as in the above-described first embodimentcan be obtained.

Furthermore, as for the adjustment of the standard oscillation frequencyof the temperature compensated oscillator in fabrication and theadjustment of the frequency of the temperature compensated oscillator bythe external input voltage called an AFC input voltage, the same effectscan be obtained also by a kind of resister network as shown in FIG. 14.

In FIG. 14, a digital control voltage division circuit 251 which iscontrolled by the digital signal from the memory circuit 19 divides theexternal input voltage from the input terminal 12 and applies it to oneof terminals of a digital control voltage division circuit 253 which iscontrolled by the digital signal from the memory circuit 19. Further, adigital control voltage division circuit 255 which is controlled by thedigital signal from the memory circuit 19 divides an output voltage of aconstant-voltage source 250 and applies it to the other terminal of thedigital control voltage division circuit 253.

Then, a divided voltage outputted to an output line 256 of the digitalcontrol voltage division circuit 253 is used as the second controlvoltage Vo2, and the voltage changes due to both of the external inputvoltage from the input terminal 12 and the divided voltage from thedigital control voltage division circuit 255. Moreover, the output ofthe divided voltage changes in dependency on the external input voltagefrom the input terminal 12 and the divided voltage from the digitalcontrol voltage division circuit 255 in accordance with the divisionratio of the digital control voltage division circuit 253.

Second Embodiment: FIG. 15 and FIG. 16

Next, the second embodiment of a temperature compensated oscillatoraccording to the present invention is explained with reference to FIG.15, FIG. 16, and the like.

FIG. 15 is a block circuit diagram showing a configuration of thetemperature compensated oscillator, in which elements corresponding tothose in the first embodiment shown in FIG. 1 are assigned the samenumerals and symbols, the description thereof is omitted, or simplified.

Components of the temperature compensated oscillator shown in FIG. 15 issubstantially the same as the components in FIG. 1 except that atemperature detection circuit 201 is newly added and that digitalcontrol voltage division circuits 205 and 207 are provided in place ofthe operational amplifier circuit 29, the resistance element 27, and thedigital control variable resistance circuit 21 in FIG. 1.

A control voltage generation circuit 23′ has the same circuitconfiguration as that of the control voltage generation circuit 23 shownin FIG. 1 except that the P-channel MOS transistor 37 in FIG. 1 isreplaced with an N-channel MOS transistor 38, that both terminals of adigital control voltage division circuit 33 are connected to an outputvoltage line 203 of the newly provided temperature detection circuit 201and to a ground power line 26 of the control voltage generation circuit23′, respectively, and that the digital control voltage divisioncircuits 205 and 207 which serve the same operation as that of theoperational amplifier circuit 29 are provided in place of theoperational amplifier circuit 29 and the like as described above.

Circuit configurations and functions of a frequency adjustment circuit45 and an oscillation circuit 47 are the same as those in the firstembodiment, and thus the description thereof is omitted.

A circuit configuration and a function of a temperature detectioncircuit 13 are the same as those of the temperature detection circuit 13shown in FIG. 2 in the first embodiment.

The temperature detection circuit 201 is constituted by an N-channel MOStransistor 125, resistance elements 119 and 106, an operationalamplifier circuit 111, and the like similarly to the temperaturedetection circuit 13′ shown in FIG. 9.

A circuit configuration and a function of an external control voltageinput circuit 17 are the same as those of the external control voltageinput circuit 17 shown in FIG. 3 in the first embodiment, and thus thedescription thereof is omitted. A configuration of a memory circuit 19is the same as in the first embodiment.

In the control voltage generation circuit 23′, connection of a digitalcontrol voltage division circuit 31 is completely the same as in thefirst embodiment shown in FIG. 1, and thus the description thereof isomitted. Both terminals of a digital control voltage division circuit 33are connected to the output voltage line 203 of the temperaturedetection circuit 201 and the ground power line 26 of the controlvoltage generation circuit 23′ as described above.

A divided voltage output of the digital control voltage division circuit31 is inputted to a gate G5 of the N-channel MOS transistor 38 as a gatevoltage, and a divided voltage output of the digital control voltagedivision circuit 33 is inputted to a gate G2 of an N-channel MOStransistor 35 as a gate voltage.

Also in this embodiment, the digital control voltage division circuit 31constitutes a first gate voltage generation circuit, and the digitalcontrol voltage division circuit 33 constitutes a second gate voltagegeneration circuit.

A source S5 of the N-channel MOS transistor 38 is connected to theground power line 26 via a third resistance element 22, and a source S2of the N-channel MOS transistor 35 is connected to the ground power line26 via a fourth resistance element 20.

Drains D2 and D5 of the N-channel MOS transistors 35 and 38 are commonlyconnected, and a drain connection point 44 therebetween is connected toa positive power line 25 via a first resistance element 39 and also tothe ground power line 26 via a second resistance element 43.

In this embodiment, the N-channel MOS transistor 38 constituting a firstMOS transistor, the N-channel MOS transistor 35 constituting a secondMOS transistor, and the digital control voltage division circuits 31 and33 constitute a quadratic term voltage generation circuit. Further, inthis embodiment, the ground power line 26 is a first power line, whichdiffers from the case of the first embodiment shown in FIG. 1. Moreover,while the sources of both the transistors 38 and 35 are connected to theground power line 26 being the first power line, one of them may beconnected to another power line (a second power line) if it is a powerline having the same polarity.

A first control voltage Vo1 outputted from the drain connection point 44of the control voltage generation circuit 23′ and a second controlvoltage Vo2 composed of a divided voltage outputted from the digitalcontrol voltage division circuit 205 are inputted to the frequencyadjustment circuit 45 via the signal lines 46 and 48, respectively.

Next, the operation of the temperature compensated oscillator of thesecond embodiment is explained.

In FIG. 15, the temperature detection circuit 13 detects a temperatureof the oscillation circuit 47 and outputs a voltage dependent on thetemperature to the control voltage generation circuit 23′. Thetemperature detection circuit 201 also detects the temperature of theoscillation circuit 47 and outputs a voltage dependent on thetemperature to the control voltage generation circuit 23′.

First of all, explanation is made on the principle of operation ofgenerating the first control voltage Vo1.

The operation of the temperature detection circuit 13 is the same as inthe first embodiment, and thus the description thereof is omitted.

The temperature detection circuit 201 is configured in the same manneras the temperature detection circuit 13′ shown in FIG. 9, in which avoltage, which is obtained by dividing the power-supply voltage by thepower supply 100 by the resistance elements 115 and 101, is inputted tothe gate G4 of the N-channel MOS transistor 125 in order to pass anelectric current through the drain D4. As the temperature changes from alow temperature to a high temperature, the electric current through thedrain D4 of the N-channel MOS transistor 125 increases and the voltageat the connection point 120 between the resistance element 119 and thedrain D4 of the N-channel MOS transistor 125 linearly drops.

Since the voltage at the connection point 120 is inputted to thenegative input terminal of the operational amplifier circuit 111 via theresistance element 107, the operation of the operational amplifiercircuit 111 becomes inverse amplification and its output voltagelinearly increases with increases in temperature. In short, temperatureand the output voltage are in a proportional relationship.

To the positive input terminal of the operational amplifier circuit 111,a voltage obtained by dividing the power-supply voltage by resistanceelements 123 and 124 is inputted as an offset voltage.

It is also possible to replace the resistance element 106 with a digitalcontrol variable resistance circuit to form a complete unit, and then tocontrol the drain current of the N-channel MOS transistor 125 by digitaldata stored in the memory circuit 19.

The operation of the memory circuit 19 is the same as in the firstembodiment, and thus the description thereof is omitted.

As described above, the output voltage of the temperature detectioncircuit 13 shown in FIG. 15 linearly drops with increases intemperature, and the output voltage of the temperature detection circuit201 linearly increases with increases in temperature.

The basic principles of operations of the N-channel MOS transistor 35and the N-channel MOS transistor 38 with respect to changes intemperature are the same as those explained in the first embodiment, andthus explanation thereof is made using temperature area partitions of afirst temperature area, a second temperature area, and a thirdtemperature area which are sequentially partition temperature areas froma lower temperature side as described in the first embodiment.

The N-channel MOS transistor 35 is ON and the N-channel MOS transistor38 is OFF in the first temperature area at the low temperature side,both the N-channel MOS transistors 35 and 38 are OFF in the secondtemperature area at the intermediate, and the N-channel MOS transistor35 is OFF and the N-channel MOS transistor 38 is ON in the thirdtemperature area at the high temperature side.

An appearance of changes in the first control voltage Vo1 generated atthe drain connection point 44 with respect to temperatures at that timebecomes like a curved line 277 in a diagram shown in FIG. 16, in whichtemperature is plotted on the abscissa axis and the control voltage isplotted on the ordinate axis.

Of the curved line 277, a range below a temperature T1 (a firsttemperature area TA1) corresponds to a curved line part 271, a rangefrom the temperature T1 to a temperature T2 (a second temperature areaTA2) corresponds to a curved line part 273, and a range exceeding thetemperature T2 (a third temperature area TA3) corresponds to a curvedline part 275 to form a quadratic term voltage.

Since the changes in the first control voltage Vo1 are, as shown by thecurved line 277, generated by the square law of the MOS transistor inprinciple, they become a quadratic curve with respect to temperatures,and thus it is unnecessary to generate the voltage separately for thelow temperature part and the high temperature part.

If the values of the temperature T1 and the temperature T2 areappropriately selected, it is possible to accurately compensatequadratic temperature characteristics of a fork resonator.

Also in this case, the digital control voltage division circuit 31 beingthe first gate voltage generation circuit shown in FIG. 15 changes thefirst gate voltage outputted to the gate G5 of the N-channel MOStransistor 38 linearly with respect to the changes in temperature atleast in the third temperature area TA3. Further, the digital controlvoltage division circuit 33 being the second gate voltage generationcircuit changes the second gate voltage outputted to the gate G2 of theN-channel MOS transistor 35 linearly with respect to the changes intemperature at least in the first temperature area TA1.

The operations of the third resistance element 22 and the fourthresistance element 20 are completely the same as those in the firstembodiment, and thus the description thereof is omitted.

Since the quadratic temperature characteristics of the fork resonatorare compensated in the second embodiment, it is unnecessary to add atemperature gradient to the second control voltage Vo2 in order tocorrect the gradient of the cubic temperature characteristics of the ATcut crystal as explained in the first embodiment.

The principle of operation of adjusting the offset voltage and theprinciple of operation of the frequency adjustment circuit 45 are thesame as those in the first embodiment, and thus the description thereofis omitted.

INDUSTRIAL APPLICABILITY

As has been described, a temperature compensated oscillator according tothe invention can generate a control voltage in the shape of asequential approximate cubic curve only by electric characteristics, ofa P-channel MOS transistor and an N-channel MOS transistor withoutrequiring circuits which are complex and difficult to adjust such as ahigh temperature part/low temperature part separation circuit, and a lowtemperature part cubic curve voltage generation circuit and a hightemperature part cubic curve voltage generation circuit.

Further, the approximate cubic curve and a linear line which corrects agradient can be added without using an adding circuit, which greatlysimplifies the circuit configuration and facilitates integration of thetemperature compensated oscillator to a semiconductor integrated circuitand can greatly reduce an area of a semiconductor integrated circuitchip, resulting in great effect on improvement of yields and reductionin cost.

Furthermore, the present invention presents the same effect also on atemperature compensated oscillator having temperature characteristics ofa quadratic curve as in the compensation of a cubic curve.

What is claimed is:
 1. A temperature compensated oscillator, comprising:an oscillation circuit; a frequency adjustment circuit for changing anoscillation frequency of said oscillation circuit by a control voltage;a temperature detection circuit for detecting a temperature in avicinity of said oscillation circuit and generating at least one outputvoltage based on the detected temperature; and a control voltagegeneration circuit including a cubic term voltage generation circuit forgenerating a cubic term voltage as said control voltage based on theoutput voltage from said temperature detection circuit, wherein saidcubic term voltage generation circuit includes a first circuit whichgenerates a voltage curve projecting upward by a first square law and asecond circuit which generates a voltage curve projecting downward by asecond square law, each depending on an input voltage based on theoutput voltage from said temperature detection circuit respectively. 2.The temperature compensated oscillator according to claim 1, whereinsaid cubic term voltage generation circuit is a circuit which generatesthe cubic term voltage by connecting the voltage curve projecting upwardgenerated by said first circuit and the voltage curve projectiondownward generated by said second circuit, under control of said firstcircuit and said second circuit.
 3. The temperature compensatedoscillator according to claim 2, wherein said first circuit includes afirst MOS transistor having a source connected to a first power line,wherein said second circuit includes a second MOS transistor having aconduction type different from that of said first MOS transistor and asource connected to a second power line, and wherein said cubic termvoltage generation circuit further comprises: a first gate voltagegeneration circuit for generating a first gate voltage based on theoutput voltage of said temperature detection circuit; and a second gatevoltage generation circuit for generating a second gate voltage based onthe output voltage of said temperature detection circuit, an outputterminal for outputting said first gate voltage of said first gatevoltage generation circuit being connected to a gate of said first MOStransistor, an output terminal for outputting said second gate voltageof said second gate voltage generating circuit being connected to a gateof said second MOS transistor, and a drain of said first MOS transistorand a drain of said second MOS transistor being commonly connected to bean output terminal of said control voltage.
 4. The temperaturecompensated oscillator according to claim 1, wherein said controlvoltage generation circuit outputs the cubic term voltage generated bysaid cubic term voltage generation circuit as a first control voltage,further comprises a linear term voltage generation circuit forgenerating a linear term voltage based on the output voltage of saidtemperature detection circuit, and outputs the linear term voltagegenerated by said linear term voltage generation circuit as a secondcontrol voltage, and wherein said frequency adjustment circuit is acircuit for controlling the oscillation frequency of said oscillationcircuit by said first control voltage and said second control voltage.5. The temperature compensated oscillator according to claim 1, whereinsaid temperature detection circuit is a circuit which comprises twotemperature sensors different in temperature gradient and divides adifference between output voltages of said two temperature sensors intoan arbitrary ratio to output it as a temperature detection voltage. 6.The temperature compensated oscillator according to claim 1, whereinsaid control voltage generation circuit is a circuit which outputs thecubic term voltage generated by said cubic term voltage generationcircuit as a first control voltage, further comprises a linear termvoltage generation circuit for generating a linear term voltage based onthe output voltage of said temperature detection circuit, and outputsthe linear term voltage generated by said linear term voltage generationcircuit as a second control voltage, wherein said control voltagegeneration circuit further comprises an external control voltage inputcircuit including an operational amplifier circuit for inputting theretoan external voltage for adjusting a frequency from an outside togenerate an output voltage, wherein said control voltage generationcircuit inputs the output voltage outputted from said external controlvoltage input circuit as an offset input voltage of an operationalamplifier circuit constituting said linear term voltage generationcircuit, an amplification factor and an offset input voltage of saidoperational amplifier circuit constituting said external control voltageinput circuit being controlled by digital data stored in a memorycircuit, and wherein said frequency adjustment circuit is a circuit forcontrolling the oscillation frequency of said oscillation circuit bysaid first control voltage and said second control voltage.
 7. Thetemperature compensated oscillator according to claim 3, wherein saidoutput terminal of said control voltage is further connected to saidfirst power line or a power line having the same polarity as that ofsaid first power line via a first resistance element as well as to saidsecond power line or a power line having the same polarity as that ofsaid second power line via a second resistance element.
 8. Thetemperature compensated oscillator according to claim 7, wherein saidfirst resistance element and said second resistance element aredifferent in temperature coefficient with respect to resistance value.9. The temperature compensated oscillator according to claim 8, whereina plurality of pairs of resistance elements having differentcombinations of temperature coefficients with respect to resistancevalues are provided as said first resistance element and said secondresistance element, and switches for selectively switching to any ofsaid plurality of pairs of resistance elements for use are provided. 10.The temperature compensated oscillator according to claim 4, whereinsaid linear term voltage generation circuit is an operational amplifiercircuit.
 11. The temperature compensated oscillator according to claim10, wherein a memory circuit is provided which stores data from anoutside and controls an amplification factor and an offset input voltageof said operational amplifier circuit based on the stored digital data.12. The temperature compensated oscillator according to claim 4, whereinsaid frequency adjustment circuit comprises a capacitance elementconstituting a load capacitance of said oscillation circuit and being avoltage variable capacitance element of which capacitance value ischanged by said control voltage, such that said first control voltage isapplied to one electrode of said voltage variable capacitance elementand said second control voltage is applied to other electrode of saidvoltage variable capacitance element.
 13. The temperature compensatedoscillator according to claim 4, wherein said frequency adjustmentcircuit comprises capacitance elements constituting a load capacitanceof said oscillation circuit and being voltage variable capacitanceelements of which capacitance values are changed by said controlvoltage, and wherein said voltage variable capacitance elements areconstituted by a first voltage variable capacitance element to whichsaid first control voltage is applied and a second voltage variablecapacitance element to which said second control voltage is appliedwhich are connected in parallel.
 14. The temperature compensatedoscillator according to claim 3, wherein said output terminal of saidcontrol voltage is further connected to at least one arbitrary voltagesource via a resistance element.
 15. The temperature compensatedoscillator according to claim 14, wherein said resistance element has aresistance value of 100 kilohms or more.
 16. The temperature compensatedoscillator according to claim 3, wherein at least one of said first andsecond gate voltage generation circuits is a circuit for generating saidfirst or said second gate voltage based on a difference between theoutput voltage of said temperature detection circuit and an arbitraryreference voltage.
 17. The temperature compensated oscillator accordingto claim 16, wherein at least one of said first and second gate voltagegeneration circuits is a voltage division circuit for dividing a voltagedifference between the output voltage of said temperature detectioncircuit and said arbitrary reference voltage.
 18. The temperaturecompensated oscillator according to claim 16, wherein said referencevoltage applied to at least one of said first and second gate voltagegeneration circuits is a voltage of said first power line or said secondpower line.
 19. The temperature compensated oscillator according toclaim 3, wherein at least one of said first and second gate voltagegeneration circuits is a circuit capable of controlling the generatedgate voltage thereof based on external data.
 20. The temperaturecompensated oscillator according to claim 19, wherein a memory circuitfor storing said external data is provided, and at least one of saidfirst and second gate voltage generation circuits is a circuit capableof controlling the generated gate voltage thereof based on said datastored in said memory circuit.
 21. The temperature compensatedoscillator according to claim 20, wherein said memory circuit is capableof controlling storage and read of digital data from an outside via aserial input/output line.
 22. The temperature compensated oscillatoraccording to claim 3, wherein said frequency adjustment circuitcomprises a capacitance element constituting a load capacitance of saidoscillation circuit and being a voltage variable capacitance element ofwhich capacitance value is changed by said control voltage.
 23. Thetemperature compensated oscillator according to claims 22, wherein saidvoltage variable capacitance element is an MIS variable capacitor. 24.The temperature compensated oscillator according to claim 3, whereinsaid each source of said first and second MOS transistors is connectedto said first or second power line via a resistance element for limitinga drain current.
 25. The temperature compensated oscillator according toclaim 24, wherein said resistance element is a digital control variableresistance circuit, and wherein a memory circuit is provided which iscapable of controlling a resistance value of said digital controlvariable resistance circuit based on digital data stored therein. 26.The temperature compensated oscillator according to claim 3, whereinsaid temperature detection circuit includes: a P-channel MOS transistorhaving a source connected to a first power line of said temperaturedetection circuit and a drain connected to a second power line thereofvia a resistance element; and a gate voltage generator for supplying agate voltage exceeding a threshold voltage of said P-channel MOStransistor to a gate of said P-channel MOS transistor, and wherein saidtemperature detection circuit outputs a voltage generated at aconnection point between said drain of said P-channel MOS transistor andsaid resistance element as a temperature detection voltage.
 27. Thetemperature compensated oscillator according to claim 26, wherein saidsource of said P-channel MOS transistor is connected to said first powerline via a resistance element.
 28. The temperature compensatedoscillator according to claim 26, wherein said temperature detectioncircuit outputs the voltage generated at said connection point betweensaid drain of said P-channel MOS transistor and said resistance elementas the temperature detection voltage via an operational amplifiercircuit.
 29. The temperature compensated oscillator according to claim3, wherein said temperature detection circuit includes: an N-channel MOStransistor having a drain connected to a first power line of saidtemperature detection circuit via a resistance element and a sourceconnected to a second power line thereof; and a gate voltage generatorfor supplying a gate voltage exceeding a threshold voltage of saidN-channel MOS transistor to a gate of said N-channel MOS transistor, andwherein said temperature detection circuit outputs a voltage generatedat a connection point between said drain of said N-channel MOStransistor and said resistance element as a temperature detectionvoltage.
 30. The temperature compensated oscillator according to claim29, wherein said source of said N-channel MOS transistor is connected tosaid first power line via a resistance element.
 31. The temperaturecompensated oscillator according to claim 29, wherein said temperaturedetection circuit outputs the voltage generated at said connection pointbetween said drain of said N-channel MOS transistor and said resistanceelement as the temperature detection voltage via an operationalamplifier circuit.
 32. The temperature compensated oscillator accordingto claim 4, wherein when a preset temperature range in a temperaturerange in use is defined as a second temperature area, a temperaturerange on a lower temperature side than that is defined as a firsttemperature area, and a temperature range on a high temperature sideexceeding said second temperature area is defined as a third temperaturearea, said first gate voltage generation circuit has an area in whichsaid first gate voltage linearly changes with respect to changes intemperature at least in said third temperature area, and said secondgate voltage generation circuit has an area in which said second gatevoltage linearly changes with respect to changes in temperature at leastin said first temperature area.
 33. A temperature compensatedoscillator, comprising: an oscillation circuit; a frequency adjustmentcircuit for changing an oscillation frequency of said oscillationcircuit by a control voltage; a temperature detection circuit fordetecting a temperature in a vicinity of said oscillation circuit andgenerating at least one output voltage based on the detectedtemperature; and a control voltage generation circuit including aquadratic term voltage generation circuit for generating a quadraticterm voltage as said control voltage based on the output voltage fromsaid temperature detection circuit, wherein said quadratic term voltagegeneration circuit includes a first circuit which generates a voltagecurve projecting upward by a first square law and a second circuit whichgenerates a voltage curve projecting upward by a second square law, eachdepending on an input voltage based on the output voltage from saidtemperature detection circuit respectively.
 34. The temperaturecompensated oscillator according to claim 33, wherein said quadraticterm voltage generation circuit is a circuit which generates thequadratic term voltage by connecting the voltage curve projecting upwardgenerated by said first circuit and the voltage curve projecting upwardgenerated by said second circuit, under control of said first circuitand said second circuit.
 35. The temperature compensated oscillatoraccording to claim 34, wherein said first circuit includes a first MOStransistor having a source connected to a first power line, wherein saidsecond circuit includes a second MOS transistor having a same conductiontype as that of said first MOS transistor and a source connected to asecond power line, and wherein said cubic term voltage generationcircuit further comprises: a first gate voltage generation circuit forgenerating a first gate voltage based on the output voltage of saidtemperature detection circuit; and a second gate voltage generationcircuit for generating a second gate voltage based on the output voltageof said temperature detection circuit, an output terminal for outputtingsaid first gate voltage of said first gate voltage generation circuitbeing connected to a gate of said first MOS transistor, an outputterminal for outputting said second gate voltage of said second gatevoltage generating circuit being connected to a gate of said second MOStransistor, and a drain of said first MOS transistor and a drain of saidsecond MOS transistor being commonly connected to be an output terminalof said control voltage.